Design methodology is not just about chip design, but also considers the way the chip interconnects with the package, how the package influences the system and how IP can best be integrated.
After the feasibility study and architecture concept proposal, the next step is full custom IC design.
Usually the high-level behavioral models are first further refined from the initial feasibility study using modelling methodologies. Next the circuit block schematics and layout design are implemented. A full chip verification with all components in place will ensure highest safety for first-time-right silicon.
EquipIC Supply Chain uses the industry’s standard chip design and verification tools such as provided by -for example- Cadence and Mentor Graphics.
You have the flexibility to provide either chip specification or RTL model or Netlist, allowing EquipIC Supply Chain to complete the design and do the ASIC tape-out to the selected foundry. We will manage the complete design process and turn out the most optimal IC design.
Example of RF IC design
EquipIC can also replicate your original device avoiding expensive system re-qualifications or redesigns. We do have experience in this field and can guarantee an end product as a form, fit, and functional replacement of the original datasheet performance, without the need for any software changes.
EquipIC Supply Chain has had multiple design wins over a broad range of applications. To list a few examples:
- 32-bit processor/MCU in UMC 55nm SST Flash for bank card/IoT
- Optical networking ICs in Globalfoundries 90nm
- 60 GHz WIMAX ICs in TSMC’ 65nm
- Up-conversion / down-conversion networking ICs in TSMC’ 65nm
- Smart Card Controller IC in NXP’s 0.16um with e-Flash
- Display driver ICs in Globalfoundries 0.35um (18V high voltage process) with 10nA standby
- TOF detector
- Digital Class D audio amplifier controllers from 0.18um to 55nm for high-end audio
- EOL 4MB DRAM product redesign in 0.18um VRAM for aerospace/defense
- Memory ICs in TSMC’ 0.18um Flash
- Precision voltage regulator ICs in XFAB 0.35um with fuse
- High-frequency front end designs for satellite terminal in TSMC’s 0.25um mixed-mode process
- 3G baseband ICs in Tower’s 0.18um
EQUIPIC: optimizing IC designs to minimize production risks